Balıkesir Üniversitesi
Kütüphane ve Dokümantasyon Daire Başkanlığı

Logic design / (Kayıt no. 18313)

MARC ayrıntıları
000 -LEADER
fixed length control field 02645nam a2200289 i 4500
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 021127s2003 flua b 001 0 eng
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 0849317347
040 ## - CATALOGING SOURCE
Original cataloging agency BAUN
Language of cataloging eng
Transcribing agency BAUN
Description conventions rda
049 ## - LOCAL HOLDINGS (OCLC)
Holding library BAUN_MERKEZ
050 04 - LIBRARY OF CONGRESS CALL NUMBER
Classification number TK7868.L6
Item number V63 2003
245 00 - TITLE STATEMENT
Title Logic design /
Statement of responsibility, etc editor-in-chief, Wai-Kai Chen
264 #1 - PRODUCTION, PUBLICATION, DISTRIBUTION, MANUFACTURE, AND COPYRIGHT NOTICE
Place of production, publication, distribution, manufacture Boca Raton, Fla. :
Name of producer, publisher, distributor, manufacturer CRC Press,
Date of production, publication, distribution, manufacture, or copyright notice [2003]
Date of production, publication, distribution, manufacture, or copyright notice ©2003
300 ## - PHYSICAL DESCRIPTION
Extent 1 volume (various pagings) :
Other physical details illustrations ;
Dimensions 27 cm
336 ## - CONTENT TYPE
Content Type Term text
Content Type Code txt
Source rdacontent
337 ## - MEDIA TYPE
Media Type Term unmediated
Media Type Code unmediated
Source rdamedia
338 ## - CARRIER TYPE
Carrier Type Term volume
Carrier Type Code volume
Source rdacarrier
490 1# - SERIES STATEMENT
Series statement Principles and applications in engineering series
504 ## - BIBLIOGRAPHY, ETC. NOTE
Bibliography, etc Includes bibliographical references and index
505 00 - FORMATTED CONTENTS NOTE
Title Expressions of Logic Functions
Statement of responsibility / Saburo Muroga
Title -- Basic Theory of Logic Functions
Statement of responsibility / Saburo Muroga
Title -- Simplification of Logic Expressions
Statement of responsibility / Saburo Muroga
Title -- Binary Decision Diagrams
Statement of responsibility / Shin-ichi Minato, Saburo Muroga
Title -- Logic Synthesis with AND and OR Gates in Two Levels
Statement of responsibility / Saburo Muroga
Title -- Sequential Networks
Statement of responsibility / Saburo Muroga
Title -- Logic Synthesis with AND and OR Gates in Multi-levels
Statement of responsibility / Yuichi Nakamura, Saburo Muroga
Title -- Logic Properties of Transistor Circuits
Statement of responsibility / Saburo Muroga
Title -- Logic Synthesis with NAND (or NOR) Gates in Multi-levels
Statement of responsibility / Saburo Muroga
Title -- Logic Synthesis with a Minimum Number of Negative Gates
Statement of responsibility / Saburo Muroga
Title -- Logic Synthesizer with Optimizations in Two Phases
Statement of responsibility / Ko Yoshikawa, Saburo Muroga
Title -- Logic Synthesizer by the Transduction Method
Statement of responsibility / Saburo Muroga
Title -- Emitter-Coupled Logic
Statement of responsibility / Saburo Muroga
Title -- CMOS
Statement of responsibility / Saburo Muroga
Title -- Pass Transistors
Statement of responsibility / Kazuo Yano, Saburo Muroga
Title -- Adders
Statement of responsibility / Naofumi Takagi ... [and others]
Title -- Multipliers
Statement of responsibility / Naofumi Takagi, Charles R. Baugh, Saburo Muroga
Title -- Dividers
Statement of responsibility / Naofumi Takagi, Saburo Muroga
Title -- Full-Custom and Semi-Custom Design
Statement of responsibility / Saburo Muroga
Title -- Programmable Logic Devices
Statement of responsibility / Saburo Muroga
Title -- Gate Arrays
Statement of responsibility / Saburo Muroga
Title -- Field-Programmable Gate Arrays
Statement of responsibility / Saburo Muroga
Title -- Cell-Library Design Approach
Statement of responsibility / Saburo Muroga
Title -- Comparison of Different Design Approaches
Statement of responsibility / Saburo Muroga
Title -- Materials
Statement of responsibility / Stephen I. Long
Title -- Compound Semiconductor Devices for Digital Circuits
Statement of responsibility / Donald B. Estreich
Title -- Logic Design Principles and Examples
Statement of responsibility / Stephen I. Long
Title -- Logic Design Examples
Statement of responsibility / Charles E. Chang, Meera Venkataraman, Stephen I. LongMeera Venkataraman, Stephen I. Long
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Logic circuits
General subdivision Design and construction
Topical term or geographic name as entry element Integrated circuits
General subdivision Very large scale integration
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Chen, Wai-Kai,
Dates associated with a name 1936-
830 #0 - SERIES ADDED ENTRY--UNIFORM TITLE
9 (RLIN) 110056
Uniform title Principles and applications in engineering.
900 ## - EQUIVALENCE OR CROSS-REFERENCE-PERSONAL NAME [LOCAL, CANADA]
Personal Name 24266
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme Library of Congress Classification
Koha item type Kitap
Mevcut
Withdrawn status Lost status Source of classification or shelving scheme Damaged status Not for loan Collection code Home library Current library Shelving location Date acquired Cost, normal purchase price Total Checkouts Total Renewals Full call number Barcode Date last seen Date checked out Price effective from Koha item type
    Library of Congress Classification     Non-fiction Mehmet Akif Ersoy Merkez Kütüphanesi Mehmet Akif Ersoy Merkez Kütüphanesi Genel Koleksiyon 25/09/2008 145.29 1 1 TK7868.L6 V63 2003 024266 21/11/2017 28/09/2017 11/01/2015 Kitap
Bizi Sosyal Medyada Takip Edin